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Looking for information on PCI Express

Could you explain the different between sleeping states, device power states and L1 entry policy in PCI Express? Are they different than PCI architecture?

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PCI Express's architecture is uses some of the same basic principles of PCI, but implements them in a radically different way. I don't think I can answer more technical questions about PCI-E's behavior, but I can point you to a few good other places that can give you more information. For one, there's the Wikipedia entry for PCI Express, which has a nice summation of most of the basic details about PCI-E, and which at the bottom has links to summary documents for designers and engineers.

This was first published in July 2006

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